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MC34166, MC33166 3.0 A, Step-Up/Down/ Inverting Switching Regulators
The MC34166, MC33166 series are high performance fixed frequency power switching regulators that contain the primary functions required for dc-to-dc converters. This series was specifically designed to be incorporated in step-down and voltage-inverting configurations with a minimum number of external components and can also be used cost effectively in step-up applications. These devices consist of an internal temperature compensated reference, fixed frequency oscillator with on-chip timing components, latching pulse width modulator for single pulse metering, high gain error amplifier, and a high current output switch. Protective features consist of cycle-by-cycle current limiting, undervoltage lockout, and thermal shutdown. Also included is a low power standby mode that reduces power supply current to 36 A. * Output Switch Current in Excess of 3.0 A * Fixed Frequency Oscillator (72 kHz) with On-Chip Timing * Provides 5.05 V Output without External Resistor Divider * Precision 2% Reference * 0% to 95% Output Duty Cycle * Cycle-by-Cycle Current Limiting * Undervoltage Lockout with Hysteresis * Internal Thermal Shutdown * Operation from 7.5 V to 40 V * Standby Mode Reduces Power Supply Current to 36 A * Economical 5-Lead TO-220 Package with Two Optional Leadforms * Also Available in Surface Mount D2PAK Package * Moisture Sensitivity Level (MSL) Equals 1
Vin ILIMIT Oscillator S Q R PWM UVLO Thermal Reference EA 1 5 Heatsink surface (shown as terminal 6 in case outline drawing) is connected to Pin 3 D2PAK D2T SUFFIX CASE 936A MC 3x166T AWLYWW L 2 5 Pin 1. 2. 3. 4. 5. Voltage Feedback Input Switch Output Ground Input Voltage/VCC Compensation/Standby 4 1
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x A WL Y WW = 3 or 4 = Assembly Location = Wafer Lot = Year = Work Week TO-220 TH SUFFIX CASE 314A 1 5
MARKING DIAGRAMS
MC 3x166T AWLYWW
1 5
TO-220 TV SUFFIX CASE 314B
MC 3x166T AWLYWW
Heatsink surface connected to Pin 3
TO-220 T SUFFIX CASE 314D
MC 3x166T AWLYWW
1
VO 5.05 V/ 3.0 A
3
5 This device contains 143 active transistors.
1
5
Figure 1. Simplified Block Diagram (Step Down Application)
ORDERING INFORMATION
See detailed ordering and shipping information in the package dimensions section on page 17 of this data sheet.
(c) Semiconductor Components Industries, LLC, 2002
1
January, 2002 - Rev. 6
Publication Order Number: MC34166/D
MC34166, MC33166
MAXIMUM RATINGS (Note 2)
Rating Power Supply Input Voltage Switch Output Voltage Range Voltage Feedback and Compensation Input Voltage Range Power Dissipation Case 314A, 314B and 314D (TA = +25C) Thermal Resistance, Junction-to-Ambient Thermal Resistance, Junction-to-Case Case 936A (D2PAK) (TA = +25C) Thermal Resistance, Junction-to-Ambient Thermal Resistance, Junction-to-Case Operating Junction Temperature Operating Ambient Temperature (Note 3) MC34166 MC33166 Storage Temperature Range Symbol VCC VO(switch) VFB, VComp PD JA JC PD JA JC TJ TA 0 to + 70 - 40 to + 85 Tstg - 65 to +150 C Value 40 -1.5 to + Vin -1.0 to + 7.0 Internally Limited 65 5.0 Internally Limited 70 5.0 +150 Unit V V V W C/W C/W W C/W C/W C C
1. Maximum package power dissipation limits must be observed to prevent thermal shutdown activation. 2. This device series contains ESD protection and exceeds the following tests: Human Body Model 2000 V per MIL-STD-883, Method 3015. Machine Model Method 200 V. Thigh = + 70C for MC34166 3. Tlow = 0C for MC34166 = - 40C for MC33166 = + 85C for MC33166
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MC34166, MC33166
ELECTRICAL CHARACTERISTICS (VCC = 12 V, for typical values TA = +25C, for min/max values TA is the operating ambient temperature range that applies [Notes 4, 5], unless otherwise noted.)
Characteristic OSCILLATOR Frequency (VCC = 7.5 V to 40 V) ERROR AMPLIFIER Voltage Feedback Input Threshold TA = +25C TA = Tlow to Thigh VFB(th) Regline IIB PSRR VOH VOL 4.95 4.85 - - 60 4.2 - 5.05 - 0.03 0.15 80 4.9 1.6 5.15 5.2 0.078 1.0 - - 1.9 V %/V A dB V TA = +25C TA = Tlow to Thigh fOSC 65 62 72 - 79 81 kHz Symbol Min Typ Max Unit
Line Regulation (VCC = 7.5 V to 40 V, TA = +25C) Input Bias Current (VFB = VFB(th) + 0.15 V) Power Supply Rejection Ratio (VCC = 10 V to 20 V, f = 120 Hz) Output Voltage Swing High State (ISource = 75 A, VFB = 4.5 V) Low State (ISink = 0.4 mA, VFB = 5.5 V) PWM COMPARATOR Duty Cycle Maximum (VFB = 0 V) Minimum (VComp = 1.9 V) SWITCH OUTPUT Output Voltage Source Saturation (VCC = 7.5 V, ISource = 3.0 A) Off-State Leakage (VCC = 40 V, Pin 2 = Gnd) Current Limit Threshold Switching Times (VCC = 40 V, Ipk = 3.0 A, L = 375 H, TA = +25C) Output Voltage Rise Time Output Voltage Fall Time UNDERVOLTAGE LOCKOUT Startup Threshold (VCC Increasing, TA = +25C) Hysteresis (VCC Decreasing, TA = +25C) TOTAL DEVICE Power Supply Current (TA = +25C ) Standby (VCC = 12 V, VComp < 0.15 V) Operating (VCC = 40 V, Pin 1 = Gnd for maximum duty cycle)
% DC(max) DC(min) Vsat Isw(off) Ipk(switch) tr tf Vth(UVLO) VH(UVLO) ICC - - 36 31 100 55 92 0 95 0 100 0
- - 3.3 - -
(VCC -1.5) 0 4.3 100 50
(VCC -1.8) 100 6.0 200 100
V A A ns
5.5 0.6
5.9 0.9
6.3 1.2
V V
A mA
4. Low duty cycle pulse techniques are used during test to maintain junction temperature as close to ambient as possible. 5. Tlow = 0C for MC34166 Thigh = + 70C for MC34166 = - 40C for MC33166 = + 85C for MC33166
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MC34166, MC33166
V FB(th), VOLTAGE FEEDBACK INPUT THRESHOLD (V) 5.25 VCC = 12 V 5.17 5.09 5.01 VFB(th) Min = 4.95 V 4.93 4.85 - 55 VFB(th) Max = 5.15 V 100 IIB, INPUT BIAS CURRENT (nA) 80 60 40 20 0 - 55 VCC = 12 V VFB = VFB(th)
VFB(th) Typ = 5.05 V
- 25
0 25 50 75 TA, AMBIENT TEMPERATURE (C)
100
125
- 25
0 25 50 75 TA, AMBIENT TEMPERATURE (C)
100
125
Figure 2. Voltage Feedback Input Threshold versus Temperature
Figure 3. Voltage Feedback Input Bias Current versus Temperature
80 Gain 60 40
30 60 90
, EXCESS PHASE (DEGREES)
VCC = 12 V VComp = 3.25 V RL = 100 k TA = +25C
Vsat , OUTPUT SATURATION VOLTAGE (V)
A VOL, OPEN LOOP VOLTAGE GAIN (dB)
100
0
2.0 1.6 1.2 0.8 0.4 0
Phase 20 0 100 1.0 k 10 k 100 k f, FREQUENCY (Hz) 1.0 M
120 150 180 10 M
VCC = 12 V VFB = 5.5 V TA = +25C
- 20 10
0
0.4
0.8 1.2 1.6 ISink, OUTPUT SINK CURRENT (mA)
2.0
Figure 4. Error Amp Open Loop Gain and Phase versus Frequency
Figure 5. Error Amp Output Saturation versus Sink Current
f OSC , OSCILLATOR FREQUENCY CHANGE (%)
DC, SWITCH OUTPUT DUTY CYCLE (%)
4.0 VCC = 12 V
100 80 60 40 20 0 1.5 VCC = 12 V TA = +25C
0
- 4.0
- 8.0
- 12 - 55
- 25
0 25 50 75 100 TA, AMBIENT TEMPERATURE (C)
125
2.0
2.5 3.0 3.5 4.0 VComp, COMPENSATION VOLTAGE (V)
4.5
Figure 6. Oscillator Frequency Change versus Temperature
Figure 7. Switch Output Duty Cycle versus Compensation Voltage
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MC34166, MC33166
Vsat , SWITCH OUTPUT SOURCE SATURATION (V) 0 Vsw, SWITCH OUTPUT VOLTAGE (V) - 0.5 -1.0 -1.5 - 2.0 - 2.5 - 3.0 0 1.0 2.0 3.0 4.0 ISource, SWITCH OUTPUT SOURCE CURRENT (A) 5.0 VCC TA = +25C 0 - 0.2 - 0.4 - 0.6 - 0.8 -1.0 -1.2 - 55 - 25 0 25 50 75 TA, AMBIENT TEMPERATURE (C) 100 125 Isw = 10 mA VCC = 12 V Pin 5 = 2.0 V Pins 1, 3 = Gnd Pin 2 Driven Negative Gnd
Isw = 100 A
Figure 8. Switch Output Source Saturation versus Source Current
Figure 9. Negative Switch Output Voltage versus Temperature
I pk(switch) , CURRENT LIMIT THRESHOLD (A)
4.7 I CC, SUPPLY CURRENT ( A) VCC = 12 V Pins 1, 2, 3 = Gnd 4.5
160 Pin 4 = VCC Pins 1, 3, 5 = Gnd Pin 2 Open TA = +25C
120
4.3
80
4.1
40
3.9 - 55
- 25
0 25 50 75 TA, AMBIENT TEMPERATURE (C)
100
125
0 0
10
20 30 VCC, SUPPLY VOLTAGE (V)
40
Figure 10. Switch Output Current Limit Threshold versus Temperature
Figure 11. Standby Supply Current versus Supply Voltage
Vth(UVLO) , UNDERVOLTAGE LOCKOUT THRESHOLD (V)
6.5 I CC, SUPPLY CURRENT (mA) 6.0 5.5 5.0 4.5 4.0 - 55 Turn-Off Threshold VCC Decreasing Startup Threshold VCC Increasing
40
30
20 Pin 4 = VCC Pins 1, 3 = Gnd Pins 2, 5 Open TA = +25C 0 10 20 30 VCC, SUPPLY VOLTAGE (V) 40
10
- 25
0 25 50 75 TA, AMBIENT TEMPERATURE (C)
100
125
0
Figure 12. Undervoltage Lockout Threshold versus Temperature
Figure 13. Operating Supply Current versus Supply Voltage
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MC34166, MC33166
Vin + Oscillator Current Sense S Q R Pulse Width Modulator PWM Latch Undervoltage Lockout 4
Input Voltage/VCC Cin
CT
Switch Output 2
Thermal Shutdown + 100 A
5.05 V Reference Error Amp 120 + Voltage Feedback Input 1 CF RF R1 R2
L
CO
VO
Gnd
3
Compensation
5
= Sink Only Positive True Logic
Figure 14. MC34166 Representative Block Diagram
4.1 V Timing Capacitor CT Compensation 2.3 V ON Switch Output OFF
Figure 15. Timing Diagram
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MC34166, MC33166
INTRODUCTION The MC34166, MC33166 series are monolithic power switching regulators that are optimized for dc-to-dc converter applications. These devices operate as fixed frequency, voltage mode regulators containing all the active functions required to directly implement step-down and voltage-inverting converters with a minimum number of external components. They can also be used cost effectively in step-up converter applications. Potential markets include automotive, computer, industrial, and cost sensitive consumer products. A description of each section of the device is given below with the representative block diagram shown in Figure 14.
Oscillator
at 4.3 A. Figure 10 illustrates switch output current limit threshold versus temperature.
Error Amplifier and Reference
The oscillator frequency is internally programmed to 72 kHz by capacitor CT and a trimmed current source. The charge to discharge ratio is controlled to yield a 95% maximum duty cycle at the Switch Output. During the discharge of CT, the oscillator generates an internal blanking pulse that holds the inverting input of the AND gate high, disabling the output switch transistor. The nominal oscillator peak and valley thresholds are 4.1 V and 2.3 V respectively.
Pulse Width Modulator
A high gain Error Amplifier is provided with access to the inverting input and output. This amplifier features a typical dc voltage gain of 80 dB, and a unity gain bandwidth of 600 kHz with 70 degrees of phase margin (Figure 4). The noninverting input is biased to the internal 5.05 V reference and is not pinned out. The reference has an accuracy of 2.0% at room temperature. To provide 5.0 V at the load, the reference is programmed 50 mV above 5.0 V to compensate for a 1.0% voltage drop in the cable and connector from the converter output. If the converter design requires an output voltage greater than 5.05 V, resistor R1 must be added to form a divider network at the feedback input as shown in Figures 14 and 19. The equation for determining the output voltage with the divider network is:
Vout + 5.05 R2 )1 R1
The Pulse Width Modulator consists of a comparator with the oscillator ramp voltage applied to the noninverting input, while the error amplifier output is applied into the inverting input. Output switch conduction is initiated when CT is discharged to the oscillator valley voltage. As CT charges to a voltage that exceeds the error amplifier output, the latch resets, terminating output transistor conduction for the duration of the oscillator ramp-up period. This PWM/Latch combination prevents multiple output pulses during a given oscillator clock cycle. Figures 7 and 15 illustrate the switch output duty cycle versus the compensation voltage.
Current Sense
The MC34166 series utilizes cycle-by-cycle current limiting as a means of protecting the output switch transistor from overstress. Each on-cycle is treated as a separate situation. Current limiting is implemented by monitoring the output switch transistor current buildup during conduction, and upon sensing an overcurrent condition, immediately turning off the switch for the duration of the oscillator ramp-up period. The collector current is converted to a voltage by an internal trimmed resistor and compared against a reference by the Current Sense comparator. When the current limit threshold is reached, the comparator resets the PWM latch. The current limit threshold is typically set
External loop compensation is required for converter stability. A simple low-pass filter is formed by connecting a resistor (R2) from the regulated output to the inverting input, and a series resistor-capacitor (RF, CF) between Pins 1 and 5. The compensation network component values shown in each of the applications circuits were selected to provide stability over the tested operating conditions. The step-down converter (Figure 19) is the easiest to compensate for stability. The step-up (Figure 21) and voltage-inverting (Figure 23) configurations operate as continuous conduction flyback converters, and are more difficult to compensate. The simplest way to optimize the compensation network is to observe the response of the output voltage to a step load change, while adjusting RF and CF for critical damping. The final circuit should be verified for stability under four boundary conditions. These conditions are minimum and maximum input voltages, with minimum and maximum loads. By clamping the voltage on the error amplifier output (Pin 5) to less than 150 mV, the internal circuitry will be placed into a low power standby mode, reducing the power supply current to 36 A with a 12 V supply voltage. Figure 11 illustrates the standby supply current versus supply voltage. The Error Amplifier output has a 100 A current source pull-up that can be used to implement soft-start. Figure 18 shows the current source charging capacitor CSS through a series diode. The diode disconnects CSS from the feedback loop when the 1.0 M resistor charges it above the operating range of Pin 5.
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MC34166, MC33166
Switch Output
The output transistor is designed to switch a maximum of 40 V, with a minimum peak collector current of 3.3 A. When configured for step-down or voltage-inverting applications, as in Figures 19 and 23, the inductor will forward bias the output rectifier when the switch turns off. Rectifiers with a high forward voltage drop or long turn-on delay time should not be used. If the emitter is allowed to go sufficiently negative, collector current will flow, causing additional device heating and reduced conversion efficiency. Figure 9 shows that by clamping the emitter to 0.5 V, the collector current will be in the range of 100 A over temperature. A 1N5822 or equivalent Schottky barrier rectifier is recommended to fulfill these requirements.
Undervoltage Lockout
functional before the output stage is enabled. The internal 5.05 V reference is monitored by the comparator which enables the output stage when VCC exceeds 5.9 V. To prevent erratic output switching as the threshold is crossed, 0.9 V of hysteresis is provided.
Thermal Protection
An Undervoltage Lockout comparator has been incorporated to guarantee that the integrated circuit is fully
Internal Thermal Shutdown circuitry is provided to protect the integrated circuit in the event that the maximum junction temperature is exceeded. When activated, typically at 170C, the latch is forced into a `reset' state, disabling the output switch. This feature is provided to prevent catastrophic failures from accidental device overheating. It is not intended to be used as a substitute for proper heatsinking. The MC34166 is contained in a 5-lead TO-220 type package. The tab of the package is common with the center pin (Pin 3) and is normally connected to ground.
DESIGN CONSIDERATIONS Do not attempt to construct a converter on wire-wrap or plug-in prototype boards. Special care should be taken to separate ground paths from signal currents and ground paths from load currents. All high current loops should be kept as short as possible using heavy copper runs to minimize ringing and radiated EMI. For best operation, a tight component layout is recommended. Capacitors CIN, CO, and all feedback components should be placed as close to the IC as physically possible. It is also imperative that the Schottky diode connected to the Switch Output be located as close to the IC as possible.
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MC34166, MC33166
+ 100 A + 100 A Error Amp 120 Compensation 5 R1 I = Standby Mode VShutdown = VZener + 0.7 1 Compensation Error Amp 120 5 R1 1
Figure 16. Low Power Standby Circuit
Figure 17. Over Voltage Shutdown Circuit
+ 100 A
Error Amp 120 1
Compensation D2 Vin 1.0 M
5 D1 Css R1
tSoft-Start 35,000 Css
Figure 18. Soft-Start Circuit
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MC34166, MC33166
Vin 12 V + Oscillator ILIMIT 4 + S Q R PWM UVLO Q1 2 D1 1N5822 Cin 330
Thermal Reference + EA 1 5 CF 0.1 RF 68 k R1 + R2 6.8 k CO 2200 +
L 190 H
VO 5.05 V/3.0 A
3
Test Line Regulation Load Regulation Output Ripple Short Circuit Current Efficiency
Conditions Vin = 8.0 V to 36 V, IO = 3.0 A Vin = 12 V, IO = 0.25 A to 3.0 A Vin = 12 V, IO = 3.0 A Vin = 12 V, RL = 0.1 Vin = 12 V, IO = 3.0 A
Results 5.0 mV = 0.05% 2.0 mV = 0.02% 10 mVpp 4.3 A 82.8%
L = Coilcraft M1496-A or General Magnetics Technology GMT-0223, 42 turns of #16 AWG on Magnetics Inc. 58350-A2 core. Heatsink = AAVID Engineering Inc. 5903B, or 5930B. The Step-Down Converter application is shown in Figure 19. The output switch transistor Q1 interrupts the input voltage, generating a squarewave at the LCO filter input. The filter averages the squarewaves, producing a dc output voltage that can be set to any level between Vin and Vref by controlling the percent conduction time of Q1 to that of the total oscillator cycle time. If the converter design requires an output voltage greater than 5.05 V, resistor R1 must be added to form a divider network at the feedback input.
Figure 19. Step-Down Converter
3.0
MC34166 STEP-DOWN
+
1.9
Vin
-
CO
-
VO
+
R2
+
L D1
+
(Bottom View)
Figure 20. Step-Down Converter Printed Circuit Board and Component Layout
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EEEEE EEE EEEEE EEEEE EEEEE EEEEE
RF CF R1 (Top View)
Cin
MC34166, MC33166
Vin 12 V + Oscillator ILIMIT 4 + S Q R PWM UVLO D4 1N4148 Reference + EA 1 5 CF 0.47 RF 4.7 k R1 1.5 k + D3 1N967A R2 6.8 k CO 1000 *RG 620 Q2 MTP3055EL D2 1N5822 + Q1 2 Cin 330 D1 1N5822 L 190 H
Thermal
VO 28 V/0.6 A
3
*Gate resistor RG, zener diode D3, and diode D4 are required only when Vin is greater than 20 V.
Test Line Regulation Load Regulation Output Ripple Short Circuit Current Efficiency
Conditions Vin = 8.0 V to 24 V, IO = 0.6 A Vin = 12 V, IO = 0.1 A to 0.6 A Vin = 12 V, IO = 0.6 A Vin = 12 V, RL = 0.1 Vin = 12 V, IO = 0.6 A
Results 23 mV = 0.41% 3.0 mV = 0.005% 100 mVpp 4.0 A 82.8%
L = Coilcraft M1496-A or General Magnetics Technology GMT-0223, 42 turns of #16 AWG on Magnetics Inc. 58350-A2 core. Heatsink = AAVID Engineering Inc. MC34166: 5903B, or 5930B MTP3055EL: 5925B Figure 21 shows that the MC34166 can be configured as a step-up/down converter with the addition of an external power MOSFET. Energy is stored in the inductor during the on-time of transistors Q1 and Q2. During the off-time, the energy is transferred, with respect to ground, to the output filter capacitor and load. This circuit configuration has two significant advantages over the basic step-up converter circuit. The first advantage is that output short-circuit protection is provided by the MC34166, since Q1 is directly in series with Vin and the load. Second, the output voltage can be programmed to be less than Vin. Notice that during the off-time, the inductor forward biases diodes D1 and D2, transferring its energy with respect to ground rather than with respect to Vin. When operating with Vin greater than 20 V, a gate protection network is required for the MOSFET. The network consists of components RG, D3, and D4.
Figure 21. Step-Up/Down Converter
3.45 MC34166 STEP-UP/DOWN D3
1.9
R2
+
L
Cin
D1
RF
CF
R1
+
(Bottom View)
(Top View)
Figure 22. Step-Up/Down Converter Printed Circuit Board and Component Layout
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II II I II I II I II
RG Q2
IIIII III IIIII IIIII IIIII IIIII
+
Vin
-
CO
VO
+
D2
MC34166, MC33166
Vin 12 V + Oscillator ILIMIT 4 + S Q R PWM UVLO Q1 2 L 190 H D1 1N5822 Reference + EA 1 5 CF 0.47 RF 4.7 k R2 3.3 k + R1 + 2.4 k C1 0.047 VO -12 V/1.0 A CO 2200 Cin 330
Thermal
3
Test Line Regulation Load Regulation Output Ripple Short Circuit Current Efficiency
Conditions Vin = 8.0 V to 24 V, IO = 1.0 A Vin = 12 V, IO = 0.1 A to 1.0 A Vin = 12 V, IO = 1.0 A Vin = 12 V, RL = 0.1 Vin = 12 V, IO = 1.0 A
Results 3.0 mV = 0.01% 4.0 mV = 0.017% 80 mVpp 3.74 A 81.2%
L = Coilcraft M1496-A or General Magnetics Technology GMT-0223, 42 turns of #16 AWG on Magnetics Inc. 58350-A2 core. Heatsink = AAVID Engineering Inc. 5903B, or 5930B. Two potential problems arise when designing the standard voltage-inverting converter with the MC34166. First, the Switch Output emitter is limited to -1.5 V with respect to the ground pin and second, the Error Amplifier's noninverting input is internally committed to the reference and is not pinned out. Both of these problems are resolved by connecting the IC ground pin to the converter's negative output as shown in Figure 23. This keeps the emitter of Q1 positive with respect to the ground pin and has the effect of reversing the Error Amplifier inputs. Note that the voltage drop across R1 is equal to 5.05 V when the output is in regulation.
Figure 23. Voltage-Inverting Converter
3.0 + MC34166 VOLTAGE-INVERTING
+ +
Vin
+
-
1.9
CF
Cin
+ (Bottom View)
+
D1
RF
R2
R1 C1
CO
VO
+
Figure 24. Voltage-Inverting Converter Printed Circuit Board and Component Layout http://onsemi.com
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IIIII III IIIII IIIII IIIII IIIII
(Top View)
L
+
MC34166, MC33166
Vin 24 V + Oscillator ILIMIT 4 + S Q R PWM UVLO 2 1N5822 MUR110 + Thermal Reference + EA 1 5 0.1 68 k + 6.8 k 1000 + VO1 5.05 V/2.0 A T1 MUR110 VO3 1000 -12 V/100 mA VO2 + 1000 12 V/300 mA 1000
3
Tests Line Regulation 5.0 V 12 V -12 V 5.0 V 12 V -12 V 5.0 V 12 V -12 V 5.0 V 12 V -12 V TOTAL
Conditions Vin = 15 V to 30 V, IO1 = 2.0 A, IO2 = 300 mA, IO3 = 100 mA
Results 4.0 mV = 0.04% 450 mV = 1.9% 350 mV = 1.5% 2.0 mV = 0.02% 420 mV = 1.7% 310 mV = 1.3% 50 mVpp 25 mVpp 10 mVpp 4.3 A 1.83 A 1.47 A 83.3%
Load Regulation
Vin = 24 V, IO1 = 500 mA to 2.0 A, IO2 = 300 mA, IO3 = 100 mA Vin = 24 V, IO1 = 2.0 A, IO2 = 100 mA to 300 mA, IO3 = 100 mA Vin = 24 V, IO1 = 2.0 A, IO2 = 300 mA, IO3 = 30 mA to 100 mA Vin = 24 V, IO1 = 2.0 A, IO2 = 300 mA, IO3 = 100 mA
Output Ripple
Short Circuit Current
Vin = 24 V, RL = 0.1
Efficiency
Vin = 24 V, IO1 = 2.0 A, IO2 = 300 mA, IO3 = 100 mA
T1 = Primary: Coilcraft M1496-A or General Magnetics Technology GMT-0223, 42 turns of #16 AWG on Magnetics Inc. 58350-A2 core. T1 = Secondary: VO2 - 65 turns of #26 AWG T1 = Secondary: VO3 - 96 turns of #28 AWG Heatsink = AAVID Engineering Inc. 5903B, or 5930B. Multiple auxiliary outputs can easily be derived by winding secondaries on the main output inductor to form a transformer. The secondaries must be connected so that the energy is delivered to the auxiliary outputs when the Switch Output turns off. During the OFF time, the voltage across the primary winding is regulated by the feedback loop, yielding a constant Volts/Turn ratio. The number of turns for any given secondary voltage can be calculated by the following equation: # TURNS(SEC) + VO(SEC) ) VF(SEC) VO(PRI))VF(PRI) #TURNS(PRI)
Note that the 12 V winding is stacked on top of the 5.0 V output. This reduces the number of secondary turns and improves lead regulation. For best auxiliary regulation, the auxiliary outputs should be less than 33% of the total output power.
Figure 25. Triple Output Converter
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MC34166, MC33166
+ Oscillator ILIMIT 4 22 0.01 1N5822 2 L D1 + Reference EA + 1 Z1 R1 MUR415 MTP 3055E 2N3906 R1 36 k + VO + 36 V/0.25 A 1000
S Q R Q1 UVLO
R VO + 5.05 1 ) 0.7 R2
PWM
Thermal
3 Vin -12 V
5
0.22 0.002
470 k
R2 5.1 k
+
1000 Test
*Gate resistor RG, zener diode D3, and diode D4 are required only when Vin is greater than 20 V.
Conditions Vin = -10 V to - 20 V, IO = 0.25 A Vin = -12 V, IO = 0.025 A to 0.25 A Vin = -12 V, IO = 0.25 A Vin = -12 V, IO = 0.25 A
Results 250 mV = 0.35% 790 mV = 1.19% 80 mVpp 79.2%
Line Regulation Load Regulation Output Ripple Efficiency
L = Coilcraft M1496-A or ELMACO CHK1050, 42 turns of #16 AWG on Magnetics Inc. 58350-A2 core. Heatsink = AAVID Engineering Inc. 5903B or 5930B
Figure 26. Negative Input/Positive Output Regulator
+ Oscillator ILIMIT 4 + Vin 18 V 1000
S Q R UVLO
PWM Thermal + Reference EA +
2
1N5822 Brush Motor 50 k Faster
1
5.6 k
+
1.0 k 47
3 Test Low Speed Line Regulation High Speed Line Regulation
5
0.1 Conditions
56 k Results 1760 RPM 1% 3260 RPM 6%
Vin = 12 V to 24 V Vin = 12 V to 24 V
Figure 27. Variable Motor Speed Control with EMF Feedback Sensing http://onsemi.com
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MC34166, MC33166
0.001 T1 MBR20100CT + 1000 MC34166 Step-Down Converter + Output 1
1N5404 115 VAC RFI Filter + 220
0.001 0.001 MJE13005 0.047 1N4937 50
100k
MBR20100CT T2 0.01 0.001 0.001 + 1000 MC34166 Step-Down Converter + Output 2
3.3 1N4003
+
100 MBR20100CT + 1000 MC34166 Step-Down Converter + Output 3
0.001 T1 = T1 = T1 = T1 = T1 = Core and Bobbin - Coilcraft PT3595 Primary - 104 turns #26 AWG Base Drive - 3 turns #26 AWG Secondaries - 16 turns #16 AWG Total Gap - 0.002
T2 = Core - TDK T6 x 1.5 x 3 H5C2 T2 = 14 turns center tapped #30 AWG T2 = Heatsink = AAVID Engineering Inc. T2 = MC34166 and MJE13005 - 5903B T2 = MBR20100CT - 5925B
The MC34166 can be used cost effectively in off-line applications even though it is limited to a maximum input voltage of 40 V. Figure 28 shows a simple and efficient method for converting the AC line voltage down to 24 V. This preconverter has a total power rating of 125 W with a conversion efficiency of 90%. Transformer T1 provides output isolation from the AC line and isolation between each of the secondaries. The circuit self-oscillates at 50 kHz and is controlled by the saturation characteristics of T2. Multiple MC34166 post regulators can be used to provide accurate independently regulated outputs for a distributed power system.
Figure 28. Off-Line Preconverter
R JA, THERMAL RESISTANCE
PD(max) for TA = +50C Free Air Mounted Vertically Minimum Size Pad
JUNCTION TO AIR ( C/W)
70 60 50 40
3.0 2.0 oz. Copper L 2.5 2.0 1.5 1.0
L
RJA 30 0 5.0 10 15 20
25
30
L, LENGTH OF COPPER (mm)
Figure 29. D2PAK Thermal Resistance and Maximum Power Dissipation versus P.C.B. Copper Length
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PD, MAXIMUM POWER DISSIPATION (W)
80
3.5
IIII IIII IIII IIII
MC34166, MC33166
Table 1. Design Equations
Calculation ton toff (Notes 1, 2) ton Step-Down Vout ) VF Vin * Vsat * Vout ton toff ton fosc )1 toff ton fosc Iout DI IL avg ) L 2 Vin * Vsat * Vout ton DIL DIL 1 2 ) (ESR)2 8foscCo Step-Up/Down Vout ) VF1 ) VF2 Vin * VsatQ1 * VsatQ2 ton toff ton fosc )1 toff ton fosc t Iout on ) 1 toff DI IL avg ) L 2 Vin * VsatQ1 * VsatQ2 ton DIL ton )1 toff 1 2 ) (ESR)2 foscCo ton )1 toff Voltage-Inverting |Vout| ) VF Vin * Vsat ton toff ton fosc )1 toff ton fosc t Iout on ) 1 toff DI IL avg ) L 2 Vin * Vsat ton DIL 1 2 ) (ESR)2 foscCo
Duty Cycle (Note 3) IL avg Ipk(switch) L Vripple(pp) Vout
R R R Vref 2 ) 1 Vref 2 ) 1 Vref 2 ) 1 R1 R1 R1 1. Vsat - Switch Output source saturation voltage, refer to Figure 8. 2. VF - Output rectifier forward voltage drop. Typical value for 1N5822 Schottky barrier rectifier is 0.5 V. 3. Duty cycle is calculated at the minimum operating input voltage and must not exceed the guaranteed minimum DC(max) specification of 0.92. The following converter characteristics must be chosen: Vout - Desired output voltage. Iout - Desired output current. IL - Desired peak-to-peak inductor ripple current. For maximum output current especially when the duty cycle is greater than 0.5, it is suggested that IL be chosen to be less than 10% of the average inductor current IL avg. This will help prevent Ipk(switch) from reaching the guaranteed minimum current limit threshold of 3.3 A. If the design goal is to use a minimum inductance value, let IL = 2 (IL avg). This will proportionally reduce the converter's output current capability. Vripple(pp) - Desired peak-to-peak output ripple voltage. For best performance, the ripple voltage should be kept to less than 2% of Vout. Capacitor CO should be a low equivalent series resistance (ESR) electrolytic designed for switching regulator applications.
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MC34166, MC33166
ORDERING INFORMATION
Device MC33166D2T MC33166D2TR4 MC33166T MC33166TH MC33166TV MC34166D2T MC34166D2TR4 MC34166T MC34166TH MC34166TV TA= 0 to +70C TA= -40 to +85C Operating Temperature Range D2PAK D2PAK Package (Surface Mount) (Surface Mount) Shipping
TO-220 (Straight Lead) TO-220 (Horizontal Mount) TO-220 (Vertical Mount) D2PAK (Surface Mount) D2PAK (Surface Mount) TO-220 (Straight Lead) TO-220 (Horizontal Mount) TO-220 (Vertical Mount) 50 Units/Rail
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MC34166, MC33166
PACKAGE DIMENSIONS
TO-220 TH SUFFIX CASE 314A-03 ISSUE E
NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: INCH. 3. DIMENSION D DOES NOT INCLUDE INTERCONNECT BAR (DAMBAR) PROTRUSION. DIMENSION D INCLUDING PROTRUSION SHALL NOT EXCEED 0.043 (1.092) MAXIMUM. INCHES MIN MAX 0.572 0.613 0.390 0.415 0.170 0.180 0.025 0.038 0.048 0.055 0.570 0.585 0.067 BSC 0.015 0.025 0.730 0.745 0.320 0.365 0.140 0.153 0.210 0.260 0.468 0.505 MILLIMETERS MIN MAX 14.529 15.570 9.906 10.541 4.318 4.572 0.635 0.965 1.219 1.397 14.478 14.859 1.702 BSC 0.381 0.635 18.542 18.923 8.128 9.271 3.556 3.886 5.334 6.604 11.888 12.827
-T- B -P-
OPTIONAL CHAMFER
SEATING PLANE
C E
Q
U
A L
F
K
G
5X
5X
J
D 0.014 (0.356)
M
S TP
M
DIM A B C D E F G J K L Q S U
TO-220 TV SUFFIX CASE 314B-05 ISSUE J
NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: INCH. 3. DIMENSION D DOES NOT INCLUDE INTERCONNECT BAR (DAMBAR) PROTRUSION. DIMENSION D INCLUDING PROTRUSION SHALL NOT EXCEED 0.043 (1.092) MAXIMUM. DIM A B C D E F G H J K L N Q S U V W INCHES MIN MAX 0.572 0.613 0.390 0.415 0.170 0.180 0.025 0.038 0.048 0.055 0.850 0.935 0.067 BSC 0.166 BSC 0.015 0.025 0.900 1.100 0.320 0.365 0.320 BSC 0.140 0.153 --0.620 0.468 0.505 --0.735 0.090 0.110 MILLIMETERS MIN MAX 14.529 15.570 9.906 10.541 4.318 4.572 0.635 0.965 1.219 1.397 21.590 23.749 1.702 BSC 4.216 BSC 0.381 0.635 22.860 27.940 8.128 9.271 8.128 BSC 3.556 3.886 --- 15.748 11.888 12.827 --- 18.669 2.286 2.794
Q
B -P-
C
OPTIONAL CHAMFER
E
U K F
A S L W V
5X
J T H N -T-
SEATING PLANE
G
5X
0.24 (0.610)
M
D
M
0.10 (0.254)
TP
M
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MC34166, MC33166
PACKAGE DIMENSIONS
TO-220 T SUFFIX CASE 314D-04 ISSUE E
SEATING PLANE
-T- -Q- B C E
U K
12345
A L
NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: INCH. 3. DIMENSION D DOES NOT INCLUDE INTERCONNECT BAR (DAMBAR) PROTRUSION. DIMENSION D INCLUDING PROTRUSION SHALL NOT EXCEED 10.92 (0.043) MAXIMUM. DIM A B C D E G H J K L Q U INCHES MIN MAX 0.572 0.613 0.390 0.415 0.170 0.180 0.025 0.038 0.048 0.055 0.067 BSC 0.087 0.112 0.015 0.025 0.990 1.045 0.320 0.365 0.140 0.153 0.105 0.117 MILLIMETERS MIN MAX 14.529 15.570 9.906 10.541 4.318 4.572 0.635 0.965 1.219 1.397 1.702 BSC 2.210 2.845 0.381 0.635 25.146 26.543 8.128 9.271 3.556 3.886 2.667 2.972
G D
5 PL
J H
M
0.356 (0.014)
M
TQ
D2PAK D2T SUFFIX CASE 936A-02 ISSUE B
NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: INCH. 3. TAB CONTOUR OPTIONAL WITHIN DIMENSIONS A AND K. 4. DIMENSIONS U AND V ESTABLISH A MINIMUM MOUNTING SURFACE FOR TERMINAL 6. 5. DIMENSIONS A AND B DO NOT INCLUDE MOLD FLASH OR GATE PROTRUSIONS. MOLD FLASH AND GATE PROTRUSIONS NOT TO EXCEED 0.025 (0.635) MAXIMUM. DIM A B C D E G H K L M N P R S U V INCHES MIN MAX 0.386 0.403 0.356 0.368 0.170 0.180 0.026 0.036 0.045 0.055 0.067 BSC 0.539 0.579 0.050 REF 0.000 0.010 0.088 0.102 0.018 0.026 0.058 0.078 5 _ REF 0.116 REF 0.200 MIN 0.250 MIN MILLIMETERS MIN MAX 9.804 10.236 9.042 9.347 4.318 4.572 0.660 0.914 1.143 1.397 1.702 BSC 13.691 14.707 1.270 REF 0.000 0.254 2.235 2.591 0.457 0.660 1.473 1.981 5 _ REF 2.946 REF 5.080 MIN 6.350 MIN
-T- A K B
12345 OPTIONAL CHAMFER
TERMINAL 6
E
U V
S H M L
D 0.010 (0.254)
M
T
N G R
P
C
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MC34166, MC33166
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MC34166/D

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